The Computer Based Interlocking Architecture

From the desk of

 Sandeep Patalay

The Computer Based Interlocking Architecture

The Solid state Interlocking systems for Railways should ensure the following:

1. Fail safety
2. Availability
3. Reliability
4. Maintainability

 Architecture and methodology

Generally following three types of redundancy techniques are used for achieving fail-safety in the design of signaling systems:

Hardware Redundancy – In this case, more than one hardware modules of identical design with common software are used to carry out the safety functions and their outputs are continuously compared. The hardware units operate in tightly syncronised mode with comparison of outputs in every clock cycle. Due to the tight syncronisation, it is not possible to use diverse hardware or software. In this method, although random failures are taken care of, it is difficult to ensure detection of systematic failures due to use of identical hardware and software.

Software Redundancy – This approach uses a single hardware unit with diverse software. The two software modules are developed independently and generally utilize inverted data structures to take care of common mode failures. However, rigorous self check procedures are required to be adopted to compensate for use of a single Hardware unit.

Hybrid Model - The hardware units have been loosely syncronised where the units operate in alternate cycle and the outputs are compared after full operation of the two modules. Therefore, it is no more required to use identical hardware and software. Although the systems installed in the field utilize identical hardware and software, the architecture permits use of diverse hardware and software. Moreover, operation of the two units in alternate cycles permits use of common system bus and interface circuitry.

To ensure the above said points hardware and software is designed accordingly. There are various techniques to meet the above said requirements as discussed below:

Table 1: Existing Failsafe Methods employed in Design of Computer Based Interlocking Systems

Method Name	Method of Implementation	Type of Errors Detected	Practical Problems with the Method
Time Redundancy	The same software is executed on the same hardware during two different time intervals (Refer: Figure 5: Time Redundancy)	Errors Caused by transients. They are avoided by reading at two different time Intervals	Single hardware Fault leads to Shut down of the System. This method is not used since software faults are not completely found in validation. And the Self diagnostics employed for checking of hardware faults is not complete.
Hardware Redundancy	The same software is executed on two identical hardware channels (Refer: Figure 6: Hardware Redundancy)	Hardware faults are detected since outputs from both the channels are compared. And single hardware fault does not lead to shut down of the system	Software faults are not detected since the same software is running on two identical hardware channels. Software Faults at design stage are still not detected.
Diverse Hardware	Identical Software is Executed on Different hardware Versions (Refer: Figure 7: Hardware Diversity)	Hardware Design faults at the Initial stage are Detected	Software Faults at the design stage are still not detected
Diverse software	The different software versions are executed on the same hardware during two different time intervals (Refer: Figure 8: Software Diversity)	Software Faults at design stage are detected	Even though the software is diverse, they are executed on the single hardware channel; single hardware fault leads to Shut down of the system.
Diverse software on redundant hardware	The different software versions are executed on two identical hardware channels (Refer: Figure 9: Diverse software on redundant hardware)	Software Faults at design stage are detected and single hardware faults does not lead to system shut down	Hardware faults at the design stage are not detected.
Diverse software on diverse hardware	The different software versions are executed on two different hardware channels (Refer: Figure 10: Diverse software on Diverse Hardware)	Software Faults and Hardware Faults are detected at the design stage.	This methods is rarely used, Since design complexity involved is high